Tim Kogel
Tim Kogel is a Principal Engineer for Virtual Prototyping in the Synopsys Verification Group. He received his diploma and PhD degree in electrical engineering with honors from Aachen University of Technology (RWTH), Aachen, Germany, in 1999 and 2005. He has authored a book and numerous technical and scientific publications on system-level modeling of SoC platforms. Tim is leading a team of applications engineering specialists, responsible for the definition, realization and deployment of Synopsys’ Virtual Prototyping solutions.
Reiner Pope
Gajinder Panesar
Gajinder ‘Gadge’ Panesar is a Fellow at Siemens. He was CTO at UltraSoC and joined Siemens via acquisition in 2020. One of Europe’s leading SoC architects, Gadge’s experience includes senior architecture definition and design roles within both blue-chip and start-up environments. He holds more than 20 patents and is the author of more than 20 published works. Prior to joining UltraSoC, he served at NVIDIA (NASDAQ:NVDA). As Chief Architect at Picochip he created the architecture of the company’s market-defining small-cell SoCs, and continued in this capacity after the company’s acquisition by Mindspeed Inc (NASDAQ:MSPD). His previous experience includes roles at STMicroelectronics, INMOS, and Acorn Computers. He is a former Research Fellow at the UK’s Southampton University, and a former Visiting Fellow at the University of Amsterdam.
Anil Goteti
Nir Peled
Dr. Axel Schröpfer
Axel Schroepfer is a principal researcher in the security research team of SAP. He holds a Ph.D. in computer science from the Albert-Ludwigs-University Freiburg. He is interested in security and privacy enhancing technologies and their application to business software, aiming to solve customers' privacy problems and to enable novel ways of privacy-preserving business collaborations.
